LOTTERY GENERATOR IDEA AND RESET AT COUNT 59

In this example for a lottery number generator from  numbers 1-59 a reset must occur before it gets to the count of 60. (most two stage counters will count to 99 before resetting) . As most digital counters have some kind of binary value on their output pins, when certain conditions are met, a logic gate can reset the counter at a given count.  Looking at the 4026 decade counter and its truth table an 8 bit pattern emerges on its output pins for counts 1,2,3 and so on, see diagram opposite, because it needs resetting at 59 we have to look at how this can be done, one way is to set up a counter using two of these chips so a maximum count of 99 can be realized, then resetting the second 4026 in the chain after the decade count of 5.  using a  nand gate, then only a logic 0 is output when all the inputs are 1, so looking at the truth table at decade count 6, a pattern has to be located where it does not appear before on previous counts, a 2 input nand has not got enough inputs as the patterns are repeated, however a 3 input nand at outputs E,F,G on count 6, where all 3 outputs are a logic 1 does not occur earlier on counts 1-5 on these same outputs. Other logic could be used here and maybe different pins on the count 6 to set the conditions to reset the 4026.

So this output from the nand gate  is at logic 0 when  the 3 inputs are all logic 1, every other condition a logic 1 is present, this logic 0 can reset the 4026 as it requires a low to reset, this output can also be inverted to a logic 1 for other counters or devices.

A multivibrator like the 555 timer in astable mode can provide the clock pulses and fast, so the displays are moving that fast; you can not tell the number it is displaying if it were to be stopped.  A switch to the 555 timer output can start and stop the counter by stopping the clock  train pulses and should never display over 59 if wired correctly.   Also a reset count to 00 on the display can be used with a  logic 1 or a switch and would have a pull down resistor to this reset pin.

setting up a 555 timer with a fast frequency and a free button switch  to pause the count when pressed, should be used as an input to 2 x 4026 counters with 7 segment displays, then taking 3 parallel wires off E,F,G, on the decade count chip, and using these to the input of the nand gate, then connecting the output of the nand gate  to the reset the counters rest pin., this will automatically reset the counter at 59 and not 99.

Most of this would have to be bread boarded due to access of the 4026 e,f ang g pin in order to reset the count at 59.